The design of integrated circuit chips continues to evolve from the original concept of having more than one function on a chip to a complete system of components on a chip. Fabrication technology continues to rapidly decrease the design features size and increase the manufacturability size of a chip. This enables a large number of functions available to a designer to incorporate on a chip. Designers then, have the ability to create systems on an IC that are increasingly more complex and require a high-level design language in order to build, verify and test integrated circuit systems.
High-level description languages have become de rigor in complex chip design due to the inclusion of software design requirements as well as the ability to create systems on a single chip. A system may include a multitude of functions for example, a microprocessor may be considered a system as it includes functions such as a multiplier, a memory and input out as well as software, which coordinates and controls integrated operations performed by the functions and referred to as the micro-code. Functions may be contained in software design libraries that high-level designers may access in creating a system level design. High-level design is a level of abstraction with little or no low level information in order to facilitate faster design cycle time. Through the use of abstraction, a high-level design enables a proof of concept and ability to test and verify the system before fabrication and physical properties are considered. Thus enabling a decreased design cycle time.
Once the high-level system design has been proven, the lower level implementation details may then be addressed. Low-level constraints such as power and circuit timing may instill limitations that may prevent manufacturability. This may result in a high-level change in order to meet overall system level constraints. Making changes at the high-level does require a re-spin on the system design, testing and verification that increase design cycle time. Therefore enabling low level attributes to be analyzed, even if they are approximated, are generally desirable in the high-level design phase.
System level design has been increasing in complexity and designers are continuing to look for tools that enables them to not only design, test and verify a design yet be able to reduce the design cycle time. The system level designer typically has been trained to use software programming languages that enable reduced design cycle time as well as improved accuracy. System level designers may use C++ as a software programming language to create a system that includes hardware and software.
While C++ is a tool for high-level system design, other tools that implement the low level design, such as logic synthesis, require proprietary chip programming descriptions. Thus two design representations; one for high level simulation and one for low-level implementation are required. This created the potential for problems with consistency between the two chip representations and made the design cycle very error-prone especially for engineering change notices (ECN).
A standard library of functions, SystemC, was created by the Institute of Electronics and Electrical Engineers (IEEE) to address this issue. The SystemC library contains classes and functions for modeling hardware blocks that can be executed in a high-level design simulation. Synthesis tools may utilize high-level design representations through the deployment of SystemC and be used for both: high-level design and low-level implementation.
As the complexity of designing integrated circuits continues to push the limits of the design software infrastructure, the high level description languages may need to change in order to minimize the limitations/burden to the designer. The embodiment of this invention expands the capability of the design tools for the designers of integrated circuits.